Electronic Design

Embedded Test Complements Boundary Scan

Companies specializing in circuit board and system design-for-test (DFT) tools are pursuing a variety of strategies to serve test and debug applications based on innovations they announced over the ...
Design-Reuse

SynTest Receives "Multiple-capture DFT system for scan-based integrated circuits" Patent for At-Speed Scan/BIST Invention

SAN JOSE, Calif., Oct 19, 2005-- SynTest Technologies, Inc., a leading supplier of Design-for-Test (DFT) tools, was granted 33 claims on Oct. 11, 2005 under United States Patent # 6,954,887 for its ...
Semiconductor Engineering

Analog Scan: Unlocking A New Era In Mixed-Signal Test

Anyone involved in IC product sign-off that includes a mixed signal design portion knows that developing robust tests for these intricate designs has historically been a significant bottleneck, no ...
EDN

Lowering the Cost of Test with Boundary Scan

The cost of manufacturing printed circuit board assemblies (PCBAs) has always been a concern for original equipment manufacturers (OEM) and contract manufacturers (CM). This is one of the reasons why ...
Electronic Design

The Benefits of Boundary-Scan for PCB Assembly Testing

Conducting product testing on printed circuit boards (PCBs) has the potential to become costly. Because of this, it’s easy for businesses to view PCB assembly testing as an expense without much value.
EDN

Design holds the key to cost-effective SOC testing

For example, scan tests tend to run circuits in nonstandard modes, and scan shifting causes maximum power dissipation for short periods. Such high power dissipation during production test can stress ...